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  cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 1/8 MTEB6N20E3 cystek product specification n-channel enhancement mode power mosfet MTEB6N20E3 bv dss 200v i d @v gs =10v, t c =25 c 9a r ds(on) @v gs =10v, i d =5.4a 308m (typ) features ? low gate charge ? simple drive requirement ? repetitive avalanche rated ? fast switching characteristic ? pb-free lead plating and rohs compliant package symbol outline to-220 MTEB6N20E3 g gate d drain s source g d s ordering information device package shipping to-220 50 pcs/tube, 20 tubes/box, 4 boxes / carton MTEB6N20E3-0-ub-x (pb-free lead plating package) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ub : 50 pcs / tube, 20 tubes/box product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 2/8 MTEB6N20E3 cystek product specification absolute maximum ratings (t c =25c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds 200 gate-source voltage v gs 30 v continuous drain current @v gs =10v, t c =25 c 9 continuous drain current @v gs =10v, t c =100 c i d 5.7 pulsed drain current (note 1) i dm 20 avalanche current i as 2.7 a avalanche energy @ l=2m h, i d =2.7a, v dd =50v e as 7.3 repetitive avalanche energy@ l=0.05mh (note 2) e ar 5 mj total power dissipation (t c =25 ) 57 total power dissipation (t c =100) p d 23 w operating junction and storage temperature tj, tstg -55~+150 c *100% uis tested at condition of l=2mh, i as =1a, vdd=50v. note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2.2 thermal resistance, junction-to-ambient, max r th,j-a 62.5 c/w characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 200 - - v v gs =0v, i d =250 a ? bv dss / ? tj - 0.16 - v/ c reference to 25 c, i d =250 a v gs(th) 2 - 4.0 v v ds = v gs , i d =250 a g fs - 5.3 - s v ds =15v, i d =5a i gss - - 100 na v gs = 30v - - 1 v ds =200v, v gs =0v i dss - - 25 a v ds =160v, v gs =0v, tj=125 c *r ds(on) - 308 400 m v gs =10v, i d =5.4a dynamic *qg - 10.6 - *qgs - 2.3 - *qgd - 3.9 - nc i d =3a, v ds =160v, v gs =10v *t d(on) - 8.8 - *tr - 16.8 - *t d(off) - 21.2 - *t f - 19.6 - ns v ds =100v, i d =3a, v gs =10v, r g =25 ciss - 395 - coss - 47 - crss - 23 - pf v gs =0v, v ds =25v, f=1mhz
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 3/8 MTEB6N20E3 cystek product specification source-drain diode *i s - - 9 *i sm - - 20 a *v sd - - 1.3 v i f =i s , v gs =0v *trr - 50 - ns *qrr - 86 - nc i f =3a, v gs =0v, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 4/8 MTEB6N20E3 cystek product specification typical characteristics typical output characteristics 0 2 4 6 8 10 12 14 16 18 0 5 10 15 20 v ds , drain-source voltage(v) i d , drain current (a) 10v 9v 8v 7v 6.5v v gs =5v 5.5v 6v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 100 1000 10000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =4.5v v gs =10v v gs =6v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 200 300 400 500 600 700 800 900 1000 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =5a v gs =10v, i d =5a r ds( on) @tj=25c : 306m typ.
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 5/8 MTEB6N20E3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =15v gate charge characteristics 0 2 4 6 8 10 024681012 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =3a v ds =160v v ds =100 v maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) t c =25c, tj=150c v gs =10v, r jc =2.2c/w single pulse dc 100m r dson limited 100 s 1ms 10ms 10 s typical transfer characteristics 0 2 4 6 8 10 12 14 16 18 0246810 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 6/8 MTEB6N20E3 cystek product specification typical characteristics(cont.) maximum drain current vs case temperature 0 2 4 6 8 10 12 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =2.2c/w single pulse single pulse power rating, junction to case 0 100 200 300 400 500 600 700 800 900 1000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) power (w) t j(max) =150c t c =25c r jc =2.2c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =2.2c/w
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 7/8 MTEB6N20E3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds 183 c 60-150 seconds time maintained above: ? temperature (t l ) 217 c ? time (t l ) 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c875e3 issued date : 2015.09.07 revised date : page no. : 8/8 to-220 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. marking: a b MTEB6N20E3 cystek product specification dim min. max. min. max. a 0.2441 0.2598 6.20 6.60 i - * 0.1508 - * 3.83 b 0.3386 0.3543 8.60 9.00 k 0.0299 0.0394 0.76 1.00 c 0.1732 0.1890 4.40 4.80 m 0.0461 0.0579 1.17 1.47 d 0.0492 0.0571 1.25 1.45 n - * 0.1000 - * 2.54 e 0.0142 0.0197 0.36 0.50 o 0.5217 0.5610 13.25 14.25 g 0.3858 0.4094 9.80 10.40 p 0.5787 0.6024 14.70 15.30 h - * 0.6398 - * 16.25 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . e g i k m o p 3 2 1 c n h d eb6 n20 1 2 3 device name date code 4 style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-220 plastic package cystek package code: e3


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